Title :
Arbitrarily-Sized Module Location Technique in the LOP System
Author :
Odawara, Gotaro ; Iijima, Kazuhiko ; Kiyomatsu, Tetsuro
Author_Institution :
University of Tokyo, Tokyo, Japan
Abstract :
This paper describes a new location technique in the LOcation Processor (LOP), which is an automatic module location system for PWB. This technique consists of two items: one is the advanced algorithm for arbitrarily-sized and -shaped module location, and the other is the empirical path-anticipation method in the location optimization. Several experiments have proven the effectiveness of this technique, and have suggested a new approach to the automatic layout system for PWB and LSI.
Keywords :
Circuit synthesis; Circuit testing; Design automation; Inspection; Logic circuits; Logic devices; Packaging; Process design; Routing; Wire;
Conference_Titel :
Design Automation, 1982. 19th Conference on
Conference_Location :
Las Vegas, NV, USA
Print_ISBN :
0-89791-020-6
DOI :
10.1109/DAC.1982.1585575
