Top Down Design and Testability of VLSI Circuits

A top down design methodology of VLSI Circuits used at the University of Grenoble is briefly presented. The choice of a data path is analyzed with respect to testability and diagnosability requirements. Design modifications (in terms of special test control) help achieves the testability requirements. Such an approachm helps to avoid costly techniques like additional scan pathes (LSSD, Bilbo) Combined with dynamic analysis techniques (Stroboscopic analysis), this approach produces efficient VLSI tests.