DocumentCode :
3146139
Title :
Verilog plus C language modeling with PLI 2.0: The next generation simulation language
Author :
Meyer, Steve
Author_Institution :
Pragmatic C Software Corp., San Francisco, CA, USA
fYear :
1998
fDate :
16-19 Mar 1998
Firstpage :
98
Lastpage :
105
Abstract :
Verilog 98 Programming Language Interface (PLI) 2.0 vpi routine is here advocated for high level electronic design. PLI 2.0 algorithms and source code examples are presented for enhancing Verilog and for modeling abstract hardware. It is argued that because Verilog PLI 2.0 implements high level programming iterators and object abstraction, no new HDL is needed. Verilog PLI 2.0 provides a superior framework for hardware design abstraction and system architecture because any abstract design can be expressed as a computer program
Keywords :
C language; circuit analysis computing; hardware description languages; high level synthesis; object-oriented programming; C language modeling; Verilog 98 Programming Language Interface; abstract hardware; hardware design abstraction; high level electronic design; high level programming iterators; next generation simulation language; object abstraction; system architecture; Application specific integrated circuits; Circuit testing; Computer architecture; Computer languages; Digital circuits; Hardware design languages; Libraries; Modeling; Programming; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Verilog HDL Conference and VHDL International Users Forum, 1998. IVC/VIUF. Proceedings., 1998 International
Conference_Location :
Santa Clara, CA
ISSN :
1085-9403
Print_ISBN :
0-8186-8415-1
Type :
conf
DOI :
10.1109/IVC.1998.660687
Filename :
660687
Link To Document :
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