• DocumentCode
    3146295
  • Title

    Low-power non-coherent data and power recovery circuit for implantable biomedical devices

  • Author

    Wilkerson, Benjamin P. ; Kim, Tae-Ho ; Kang, Jin-Ku

  • Author_Institution
    Dept. of Electron. Eng., Inha Univ., Incheon, South Korea
  • fYear
    2011
  • fDate
    17-18 Nov. 2011
  • Firstpage
    171
  • Lastpage
    174
  • Abstract
    In this paper, we present a low-power non-coherent amplitude shift keying (ASK) and phase shift keying (PSK) demodulators with inductive power self-recovery system, and the data-clock recovery circuit for implantable biomedical devices. Both circuits use different coupling factors k from 0.1 to 0.5 in ASK and 0.5 in PSK for inductive link The recovered power regulator that consists of a beta multiplier reference (BMR) with band-gap uses the bridge rectifier output as an unregulated DC input, and produces from 1.73 to 1.8 V regulated output for the demodulator with 2 MHz carrier. The PSK demodulator uses a new demodulation method that uses signals from two differential comparators with low-pass pre-filtered (LPPF) and high-pass pre-filtered (HPPF) outputs for detecting phase changing edges to recover data and clock signals. The full wave detecting signals are used as differential inputs in LPPF comparator of the ASK demodulator. The results of the demodulators with the self-power supply show up to less than 62 μW and 115 μW power consumption in ASK and PSK at 1 Mbps data transfer rate.
  • Keywords
    amplitude shift keying; biomedical electronics; demodulators; high-pass filters; low-pass filters; medical signal detection; phase shift keying; prosthetics; rectifiers; ASK demodulator; BMR; DC input; PSK demodulator; beta multiplier reference; bridge rectifier output; clock signals; data-clock recovery circuit; frequency 2 MHz; full wave detecting signals; high-pass prefiltered output; implantable biomedical devices; inductive power self-recovery system; low-pass prefiltered output; low-power non-coherent amplitude shift keying; phase shift keying; power consumption; power recovery circuit; voltage 1.73 V to 1.8 V;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SoC Design Conference (ISOCC), 2011 International
  • Conference_Location
    Jeju
  • Print_ISBN
    978-1-4577-0709-4
  • Electronic_ISBN
    978-1-4577-0710-0
  • Type

    conf

  • DOI
    10.1109/ISOCC.2011.6138674
  • Filename
    6138674