Design Through Transformation

The design and verification subsystem (DAV) within IBM´s engineering design system (EDS) was developed to significantly increase logic designer productivity. To obtain this gain in productivity, emphasis was placed on creating a system environment which would encourage a structured approach towards design. A key component within DAV is the logic transformation subsystem (LTS). Using LTS, the designer can automatically synthesize and map a higher-level logic description into a design implementation under cost, performance, and technology constraints. This paper describes the various uses of transformation within a structured design context and provides details on the implementation of LTS.