Memory-Aware Algorithms and Scheduling Techniques: From Multicore Processors to Petascale Supercomputers

This paper presents several memory-aware algorithms whose design is optimized for different target platforms. Complex memory architectures have spread in a wide range of systems, from multicore processors within cell phones to supercomputers. This trend enlightens the need to deal with heterogeneity and non uniform memory accesses. As the memory wall is closing in, taking memory architecture into consideration has become fundamental for large-scale platforms. Designing algorithms and scheduling tasks on such heterogeneous platforms is a challenging task. We present several results in that area as well as future research plans.