Partitioning and Placement Technique for Bus-Structured PWB

This paper describes a partitioning and placement procedure for bus-structured PWB´s (Printed Wiring Boards), such as single-board microcomputers, etc. In this procedure, circuits on a board are partitioned into two parts : one is bus-structured part and the other is random-structured part. Components in the former part are placed by the topological algorithm, while ones in the latter part are functionally partitioned and placed by the constructive algorithm. This paper also describes results of the application of this technique to several examples, and they have proven the effectiveness of this technique.