DocumentCode
3147852
Title
The Convex C240 architecture
Author
Chastain, Mike ; Gostin, Gary ; Mankovich, Jim ; Wallach, Steve
Author_Institution
Convex Comput. Corp., Richardson, TX, USA
fYear
1988
fDate
14-18 Nov 1988
Firstpage
321
Lastpage
329
Abstract
A description is given of the C240, a tightly coupled, shared memory, parallel multiprocessor that supports up to 40-ns ECL/CMOS Cray-like processors. It is managed by a fully semaphored Unix operating system and can support up to 4 Gb of directly addressable physical memory. Convex proprietary compiler technology provides automatic vectorization and parallelization for Fortran, C and Ada. The allocation of parallel threads to physical processors is managed by ASAP (automatic self-allocating processors), which dynamically allocates and deallocates parallel threads to the processors
Keywords
parallel architectures; 40 ns; ASAP; Ada; C; Convex C240 architecture; ECL/CMOS Cray-like processors; Fortran; Unix operating system; automatic self-allocating processors; automatic vectorization; tightly coupled shared memory parallel multiprocessor; CMOS process; Innovation management; Kernel; Memory management; Parallel processing; Registers; Resource management; Space technology; Supercomputers; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
Supercomputing '88. [Vol.1]., Proceedings.
Conference_Location
Orlando, FL
Print_ISBN
0-8186-0882-X
Type
conf
DOI
10.1109/SUPERC.1988.44669
Filename
44669
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