DocumentCode
3148177
Title
Total Stuck-at-Fault Testing by Circuit Transformation
Author
LaPaugh, A.S. ; Lipton, Richard J.
Author_Institution
Department of Electrical Engineering and Computer Science, Princeton University
fYear
1983
fDate
27-29 June 1983
Firstpage
713
Lastpage
716
Abstract
We present a new approach to the production testing of VLSI circuits. By using very structured design for testability, we achieve 100% single stuck-at fault coverage with under 20 test vectors and no search. The approach also detects most multiple faults.
Keywords
Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Integrated circuit layout; Logic circuits; Logic testing; Pins; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1983. 20th Conference on
ISSN
0738-100X
Print_ISBN
0-8186-0026-8
Type
conf
DOI
10.1109/DAC.1983.1585733
Filename
1585733
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