Title :
Single event upset error propagation between interconnected VLSI logic devices
Author_Institution :
Control Data Corp., Minneapolis, MN, USA
Abstract :
The author presents experimental and analytical results of single event upset error propagation between interconnected VLSI logic devices representative of a spaceborne system. The results show that up to 50% of the time a single transistor upset internal to a logic device can result in system failure
Keywords :
CMOS integrated circuits; VLSI; aerospace instrumentation; integrated circuit testing; integrated logic circuits; ion beam effects; logic testing; CMOS SOS VLSI; heavy ion effects; interconnected VLSI logic devices; single event upset error propagation; single transistor upset; spaceborne system; Central Processing Unit; Clocks; Cyclotrons; Error correction; Logic devices; Performance evaluation; Single event upset; Space vehicles; Testing; Very large scale integration;
Conference_Titel :
Radiation and its Effects on Devices and Systems, 1991. RADECS 91., First European Conference on
Conference_Location :
La Grande-Motte
Print_ISBN :
0-7803-0208-7
DOI :
10.1109/RADECS.1991.213553
