Title :
Compact circuit simulation model of silicon carbide static induction and junction field effect transistors
Author :
Kashyap, Avinash S. ; Ramavarapu, Prasanna L. ; Lal, Sharmila Magan ; McNutt, Ty R. ; Lostetter, Alexander B. ; Funaki, Tsuyoshi ; Mantooth, H. Alan
Abstract :
The electrical characterization and model development for silicon carbide (SiC) vertical channel SIT and JFET structures are presented in this work. A compact model is developed based on the device geometry and SiC material properties. The model is validated against measured data at 25°C and 100°C for a prototype 0.03 cm2 SiC SIT provided by Northrop Grumman. Validation is also done against the power JFET present in the combined MOSFET-SiC JFET cascode structure from SiCED. The model´s on-state and transient characteristics are validated over this temperature range. Validation of the model shows excellent agreement with measured data. The physics-based approach implemented in this model is crucial to describing the transient behavior over a wide range of application conditions and temperature ranges.
Keywords :
MOSFET; circuit simulation; junction gate field effect transistors; static induction transistors; 100 degC; 25 degC; MOSFET-SiC JFET cascode structure; SiC material properties; compact circuit simulation model; device geometry; junction field effect transistors; power JFET; silicon carbide static induction; vertical channel SIT; Breakdown voltage; Capacitance; Circuit simulation; Contact resistance; Equations; FETs; MOSFET circuits; Silicon carbide; Temperature distribution; Thermal resistance;
Conference_Titel :
Computers in Power Electronics, 2004. Proceedings. 2004 IEEE Workshop on
Print_ISBN :
0-7803-8502-0
DOI :
10.1109/CIPE.2004.1428116
