Title :
Rad hard silicon compiled library on SOI technology
Author :
Chabert, I. ; Vellou, D.
Author_Institution :
Thomson Composants Militaires et Spatiaux, Saint-Egreve, France
Abstract :
A CMOS digital library based on silicon compilation technique is presented. The library uses radiation hardened SOI process
Keywords :
CMOS integrated circuits; circuit layout CAD; integrated circuit technology; radiation hardening (electronics); semiconductor-insulator boundaries; CMOS digital library; radiation hardened SOI process; silicon compilation technique; CMOS technology; Energy consumption; Equations; Frequency; Graphics; Layout; Process design; Radiation hardening; Silicon; Software libraries;
Conference_Titel :
Radiation and its Effects on Devices and Systems, 1991. RADECS 91., First European Conference on
Conference_Location :
La Grande-Motte
Print_ISBN :
0-7803-0208-7
DOI :
10.1109/RADECS.1991.213618
