Title :
POLARIS: Polarity Propagation Algorithm for Combinational Logic Synthesis
Author :
Shinsha, T. ; Kubo, T. ; Ishihara, K. ; Hikosaka, M. ; Akiyama, K.
Author_Institution :
Systems Development Laboratory, Hitachi, Ltd., Kanagawa, Japan
Abstract :
A new algorithm for combinational logic synthesis, POLARIS, is described. POLARIS automatically generates optimized gate level logic from functional level specification described by Boolean expressions. It transforms the Boolean expressions into logical operator trees, and produces a network of physical units or units of physical design by introducing polarity and propagating it along the tree. Experimental results show that more than 96% of gate level logic structures are equal to the logic structures designed by experts.
Keywords :
Automatic logic units; Constraint optimization; Laboratories; Large scale integration; Logic design; Logic gates; Microcomputers; Network synthesis; Polarization; Software engineering;
Conference_Titel :
Design Automation, 1984. 21st Conference on
Print_ISBN :
0-8186-0542-1
DOI :
10.1109/DAC.1984.1585814