DocumentCode :
3150705
Title :
An Interactive Electrical Graph Extractor
Author :
Kors, J.L. ; Israel, M.
Author_Institution :
Institut de Programmation, Universite PARIS, PARIS
fYear :
1984
fDate :
25-27 June 1984
Firstpage :
624
Lastpage :
628
Abstract :
Simulation, interconnection verification, design Rules Checking, need a data base corresponding to the electrical graph of the circuit layout to be verified. We present an interactive electrical graph extractor, based on EMILIE2 CAD system working during the layout design and avoiding the use of an off line extractor.
Keywords :
Circuit simulation; Circuit topology; Data mining; Design automation; Flip-flops; Information geometry; Integrated circuit interconnections; Integrated circuit layout; Tree data structures; Workstations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1984. 21st Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0542-1
Type :
conf
DOI :
10.1109/DAC.1984.1585864
Filename :
1585864
Link To Document :
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