DocumentCode :
3151024
Title :
A VLSI Design Methodology Based on Parametric Macro Cells
Author :
Kriete, R.A. ; Nettleton, R.K.
Author_Institution :
Harris Corporation, Government Systems Sector, Melbourne, FL
fYear :
1984
fDate :
25-27 June 1984
Firstpage :
686
Lastpage :
688
Abstract :
A new methodology for designing VLSI circuits has been developed at Harris GSS. The methodology is based on the concept of parametric macro cells. A parametric macro cell is an MSI-level circuit which can be modified by a computer program to meet the needs of a particular design. In this paper we discuss the design methodology, chip layout, the simulation techniques and other software tools used to ensure a valid design, plus the water testing approach.
Keywords :
CMOS logic circuits; Circuit simulation; Circuit testing; Computational modeling; Design methodology; Libraries; Logic design; Logic devices; Registers; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1984. 21st Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0542-1
Type :
conf
DOI :
10.1109/DAC.1984.1585882
Filename :
1585882
Link To Document :
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