• DocumentCode
    3151727
  • Title

    An Algorithm for One and Half Layer Channel Routing

  • Author

    Song, J.N. ; Chen, Y.K.

  • Author_Institution
    Department of Electrical Engineering, Tsinghua University, Beijing, China
  • fYear
    1985
  • fDate
    23-26 June 1985
  • Firstpage
    131
  • Lastpage
    136
  • Abstract
    Channel routing is one of the key problems in the automatic layout design of LSI chips. This paper presents an efficient routing algorithm for one-and-half layer channel model which is based on single layer metal mask and fixed polysilicon crossunders in CMOS gate array. The algorithm makes parallel horizontal routing in each zone by means of ordering and prediction. The nets contend for crossunders in a greedy approach. This results in higher probability of routing success and less crossunders occupied (equally less via holes). Furthermore, by inserting interactive information at the same time of execution if necessary, the router provides more chances of 100% routing success.
  • Keywords
    CMOS technology; Costs; Design automation; Energy consumption; Large scale integration; Routing; Semiconductor device modeling; Topology; Wires; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1985. 22nd Conference on
  • ISSN
    0738-100X
  • Print_ISBN
    0-8186-0635-5
  • Type

    conf

  • DOI
    10.1109/DAC.1985.1585924
  • Filename
    1585924