• DocumentCode
    3152013
  • Title

    Three-dimensional FFTs on a digital-signal parallel processor, with no interprocessor communication

  • Author

    Kwan, Hercule ; Nelson, Robert Leonard, Jr. ; Powers, Edward J. ; Swartzlander, Earl E., Jr.

  • Author_Institution
    Trimble Navigation Ltd., Austin, TX, USA
  • Volume
    1
  • fYear
    1996
  • fDate
    3-6 Nov. 1996
  • Firstpage
    440
  • Abstract
    This paper presents an efficient method of computing the three-dimensional DFT on the AT&T DSP-3 parallel processor. The method eliminates interprocessor communication in all stages of computation. The DSP-3 parallel processor contains 16 processor elements, each of which performs part of the transform computation. Individual results are sent to the host processor to be accumulated to give the final answer. Properties of the twiddle factors are exploited to simplify the implementation. In particular, the last two stages involve no nontrivial multiplications since the multiplications at the last step are all by 1 and -1.
  • Keywords
    digital signal processing chips; discrete Fourier transforms; fast Fourier transforms; parallel processing; 3D DFT; AT&T DSP-3 parallel processor; digital-signal parallel processor; host processor; multiplications; processor elements; three-dimensional FFT; transform computation; twiddle factors; Computational complexity; Computer architecture; Discrete Fourier transforms; Drives; Flexible printed circuits; Hardware; Navigation; Power engineering computing; Process design; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals, Systems and Computers, 1996. Conference Record of the Thirtieth Asilomar Conference on
  • Conference_Location
    Pacific Grove, CA, USA
  • ISSN
    1058-6393
  • Print_ISBN
    0-8186-7646-9
  • Type

    conf

  • DOI
    10.1109/ACSSC.1996.600944
  • Filename
    600944