Title :
Test access and the testability features of the Poulson multi-core Intel Itanium® processor
Author :
Bhavsar, Dilip K. ; Poehlman, Steve J.
Abstract :
This paper presents the “t-Ring” based DFX access architecture and the testability features of Intel´s latest multi-core Itanium® processor. The architecture solves many common challenges of testing a multi-core CPU using distinctive and innovative solutions. At the core of the architecture is a hierarchical and scalable test access mechanism design providing flexible access for a variety of use models in high volume manufacturing test and debug platforms.
Keywords :
innovation management; multiprocessing systems; program debugging; testing; Poulson multicore Intel Itanium processor; debug platform; innovative solution; manufacturing test; multicore CPU testing; scalable test access mechanism design; t-ring based DFX access architecture; test access; testability feature; Arrays; Bandwidth; Clocks; Discrete Fourier transforms; Pins; Registers; Testing;
Conference_Titel :
Test Conference (ITC), 2011 IEEE International
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4577-0153-5
DOI :
10.1109/TEST.2011.6139168
