DocumentCode :
3152443
Title :
Layout Design--Lessons from the Jedi Designer
Author :
Taylor, Susan L. ; Beresford, Roderic ; Sabety, Theodore
Author_Institution :
AT&T Bell Laboratories, Murray Hill, NJ
fYear :
1985
fDate :
23-26 June 1985
Firstpage :
337
Lastpage :
337
Abstract :
Today there are many tools available that automatically produce IC layouts; however, designers are reluctant to accept the results produced by these programs. This session will explore the underlying assumptions and basic algorithms used in the design and development of these systems and will introduce the approach of the Jedi Designer system. The information presented in this tutorial will provide a basis for evaluating existing and proposed algorithms for placement, routing, and compaction of IC layouts.
Keywords :
Algorithm design and analysis; Application specific integrated circuits; Area measurement; Design automation; Human factors; Integrated circuit layout; Integrated circuit measurements; Physics computing; Routing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1985. 22nd Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0635-5
Type :
conf
DOI :
10.1109/DAC.1985.1585962
Filename :
1585962
Link To Document :
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