Title :
A Circuit Comparison System for Bipolar Linear LSI
Author :
Sakata, Takeshi ; Kishimoto, Aritoyo
Author_Institution :
Second LSI Division, NEC Corporation, Kawasaki, Japan
Abstract :
This paper describes a new LST layout verification system which compares two circuits. One is extracted from LSI layout, and the other is an original circuit diagram. This system is also capable of giving layout error information to designers. In particular, this system is applicable to bipolar linear LSIs containing a variety electrical elements.
Keywords :
Circuits; Data mining; Design automation; Large scale integration; Manuals; National electric code; Redundancy; Signal design; Signal processing; Very large scale integration;
Conference_Titel :
Design Automation, 1985. 22nd Conference on
Print_ISBN :
0-8186-0635-5
DOI :
10.1109/DAC.1985.1585976
