Title :
Plint Layout System for VLSI Chips
Author :
Anway, Hart ; Farnham, Greg ; Reid, Rebecca
Author_Institution :
General Electric Aerospace Electronic Systems Department, Utica, NY
Abstract :
PLINT is a comprehensive VAX based VLSI chip layout software system. Important features include (1) standard cell row structure layout (POLYPLINT) or randomly placed and sized rectangular macro cells (MACPLINT), (2) unlimited hierarchy, (3) automatic macrocell generation for next hierarchy level, (4) 100% routing, (5) very large chip size and/or complexity capability, (6) power and ground bus routing for both POLYPLINT and MACPLINT, (7) parameterization for generic use and (8) ability to intermix standard cell and macrocell layout when the macrocells are restricted to left or right chip edges. The software is being used at several General Electric sites for VLSI chip development.
Keywords :
Geometry; Graphics; Integrated circuit interconnections; Integrated circuit layout; Macrocell networks; Routing; Testing; Very large scale integration; Wire; Wiring;
Conference_Titel :
Design Automation, 1985. 22nd Conference on
Print_ISBN :
0-8186-0635-5
DOI :
10.1109/DAC.1985.1585980
