• DocumentCode
    3153052
  • Title

    Sigma-Delta ADC Clock Jitter in Digitally Implemented Receiver Architectures.

  • Author

    Van Zeijl, Paul T M ; van Veldhoven, Robert H.M. ; Nuijten, Peter A C M

  • Author_Institution
    Philips Res., Eindhoven
  • fYear
    2006
  • fDate
    10-12 Sept. 2006
  • Firstpage
    16
  • Lastpage
    18
  • Abstract
    The analog-to-digital (AD) converter in modern multi-band multi-mode software defined radios plays a very important role. This paper will show how the specifications for the clock of a sigma-delta AD-converters can be derived. In contrast to literature, where clock jitter (in psrms) is specified, a different approach will be taken, in which the frequency dependent spurious of the clock signal can be calculated in the case of a GSM receiver
  • Keywords
    cellular radio; radio receivers; sigma-delta modulation; software radio; GSM receiver; Groupe Speciale Mobile; analog-to-digital converter; digitally implemented receiver architecture; multiband multimode software defined radio; sigma-delta ADC clock jitter; 3G mobile communication; Analog-digital conversion; Band pass filters; Clocks; Delta-sigma modulation; GSM; Jitter; Oscillators; Receivers; Software radio;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Wireless Technology, 2006. The 9th European Conference on
  • Conference_Location
    Manchester
  • Print_ISBN
    2-9600551-5-2
  • Type

    conf

  • DOI
    10.1109/ECWT.2006.280423
  • Filename
    4057426
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3153052