Title :
A novel parallel H.264 decoder using dynamic load balance on dual core embedded system
Author :
Chen, Ding-Yun ; Ho, Chen-Tsai ; Ju, Chi-Cheng ; Tsai, Chung-Hung
Author_Institution :
Multimedia Dev. Div., Mediatek Inc., Hsinchu, Taiwan
Abstract :
The dual-core environment is more and more popular in embedded system recently. The limited buffer and limited bandwidth are critical for parallel algorithm in embedded system. This paper proposes a novel parallel algorithm using functional partitioning with dynamic load balance for video decoder. The video decoding flow of each macroblock is dynamically separated for different cores according to the buffer queue level. The extra intercommunication buffer size requires only 1.6% buffer size of traditional data partitioning algorithm for 720p decoder. The speed-up ratio is 1.74 times in average compared to original single thread code. The experiment result shows the proposed algorithm can real-time decode H.264 720p high profile on ARM Cortex-A9 400MHz dual-core system.
Keywords :
buffer storage; embedded systems; multiprocessing systems; parallel algorithms; queueing theory; resource allocation; video coding; ARM Cortex-A9 dual-core system; buffer queue level; data partitioning algorithm; dual core embedded system; dual-core environment; dynamic load balance; frequency 400 MHz; functional partitioning; intercommunication buffer size; limited bandwidth; limited buffer; macroblock; parallel H.264 decoder; parallel algorithm; single thread code; speed-up ratio; video decoder; video decoding flow; Decoding; Dynamics; Embedded systems; Heuristic algorithms; Parallel algorithms; Partitioning algorithms; Streaming media; H.264 decoder; dynamic load balance; parallel algorithms; video codec;
Conference_Titel :
Acoustics, Speech and Signal Processing (ICASSP), 2012 IEEE International Conference on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4673-0045-2
Electronic_ISBN :
1520-6149
DOI :
10.1109/ICASSP.2012.6288377
