Development of FPGA based IIR Filter implementation of 2-degree of Freedom PID controller

Author

Bhattacharyya, Anindya ; Sharma, Paawan ; Murali, N. ; Murty, S. A V Satya

Author_Institution

Electron. & Instrum.Group, Indira Gandhi Centre For Atomic Res., Kalpakkam, India

fYear

2011

fDate

16-18 Dec. 2011

Firstpage

1

Lastpage

8

Abstract

In this paper an attempt has been made to present the development of FPGA based IIR Filter implementation of PID controller which takes care of issues like the derivative kick, integral saturation, bumpless transfer from manual to automatic mode. The paper starts with an overview of the FPGA technology and motivation for using it in control and then moves on into the philosophy of closed loop PID control. The design issues are explored next using MATLAB and SYSTEM GENERATOR tools. Finally simulation results are presented. Also a performance comparison between the conventional PID control and the 2-Degree of Freedom PID control for a second order process is presented.

Keywords

IIR filters; closed loop systems; field programmable gate arrays; three-term control; 2-degree of freedom PID controller; FPGA based IIR filter implementation; FPGA technology; MATLAB; automatic mode; bumpless transfer; closed loop PID control; integral saturation; second order process; system generator; Actuators; Field programmable gate arrays; Integrated circuit modeling; Process control; Routing; Tuning; FIR; FPGA; IIR; Matlab; PID; Simulink; System Generator; degree of freedom; tuning;

fLanguage

English

Publisher

ieee

Conference_Titel

India Conference (INDICON), 2011 Annual IEEE

Conference_Location

Hyderabad

Print_ISBN

978-1-4577-1110-7

Type

conf

DOI

10.1109/INDCON.2011.6139342

Filename

6139342