DocumentCode :
3154194
Title :
SOCRATES: A System for Automatically Synthesizing and Optimizing Combinational Logic
Author :
Gregory, David ; De Geus, Aart ; Bartlett, Karen ; Hachtel, Gary
Author_Institution :
GE Calma Company, Research Triangle Park, NC
fYear :
1986
fDate :
29-2 June 1986
Firstpage :
79
Lastpage :
85
Abstract :
This paper presents SOCRATES, a system of programs which synthesize and optimize combinational logic circuits from boolean equations. SOCRATES optimizes logic using boolean and algebraic minimization techniques, and it optimizes circuits derived from this logic in a user defined technology with a rule based expert system. This paper discusses the goals of logic synthesis and the capabilities needed in a tool to meet these goals. SOCRATES´s capabilities are then presented and demonstrated with experiments run on circuits from the 1986 Design Automation Conference synthesis benchmark set.
Keywords :
Automatic logic units; Circuit synthesis; Circuit testing; Combinational circuits; Design automation; Equations; Logic circuits; Logic design; Logic functions; Minimization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1986. 23rd Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0702-5
Type :
conf
DOI :
10.1109/DAC.1986.1586072
Filename :
1586072
Link To Document :
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