DocumentCode
3154312
Title
Minplex - A Compactor that Minimizes the Bounding Rectangle and Individual Rectangles in a Layout
Author
Lin, Sching L. ; Allen, Jonathan
Author_Institution
Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, MA
fYear
1986
fDate
29-2 June 1986
Firstpage
123
Lastpage
130
Abstract
This paper presents a graph-theoretic compactor that minimizes the areas of the bounding rectangle and the individual rectangles in the layout. The minimization problem is formulated as a two-stage process. In the first stage, the area of the bounding rectangle is minimized, and in the second stage, the weighted sum of the areas of the individual rectangles is minimized, which automatically minimizes the lengths of the inter-connecting wires. This approach provides a general and rigorous method for wirelength minimization. Algorithms for generating and solving the constraints graph are proposed. The minimization algorithm includes a graph-theoretic Simplex method that can be used to solve minimization problems whose constraints can be expressed in terms of a directed graph.
Keywords
Compaction; Iterative algorithms; Iterative methods; Laboratories; Minimization methods; Very large scale integration; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1986. 23rd Conference on
ISSN
0738-100X
Print_ISBN
0-8186-0702-5
Type
conf
DOI
10.1109/DAC.1986.1586078
Filename
1586078
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