DocumentCode :
3154315
Title :
A 6.5kV ESD-protected low noise amplifier in 65-nm CMOS
Author :
Tsai, Ming-Hsien ; Hsueh, Fu-Lung ; Jou, Chewn-Pu ; Song, Ming-Hsiang ; Tseng, Jen-Chou ; Hsu, Shawn S H ; Chen, Sean
Author_Institution :
Design Technol. Div., Taiwan Semicond. Manuf. Co., Hsinchu, Taiwan
fYear :
2010
fDate :
23-28 May 2010
Firstpage :
485
Lastpage :
488
Abstract :
A new ESD topology is proposed for RF low-noise amplifier (LNA). By using the modified silicon-controlled rectifier (MSCR) in conjunction with a P+/N-well diode clamp, a 5.8-GHz LNA with 6.5-kV ESD protection circuit is demonstrated by a 65-nm CMOS technology. Compared with the reference design, the new topology enhances the ESD level from 3.5 kV to 6.5 kV for human body model (HBM) while the noise figure (NF) is only 0.13 dB higher. Under a supply voltage of 1.2 V and drain current of 6.5 mA, the proposed ESD-protected LNA has a NF of 2.57 dB with an associated power gain of 16.7 dB. The input third-order intercept point (IIP3) is −11 dBm and the input and output return losses are below −15.9 dB and −20 dB, respectively.
Keywords :
CMOS technology; Circuit noise; Circuit topology; Diodes; Electrostatic discharge; Low-noise amplifiers; Noise measurement; Radio frequency; Radiofrequency amplifiers; Rectifiers; CMOS; ESD; Low noise amplifier; RF; SCR; TLP;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Symposium Digest (MTT), 2010 IEEE MTT-S International
Conference_Location :
Anaheim, CA, USA
ISSN :
0149-645X
Print_ISBN :
978-1-4244-6056-4
Electronic_ISBN :
0149-645X
Type :
conf
DOI :
10.1109/MWSYM.2010.5518149
Filename :
5518149
Link To Document :
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