Title :
Robust Test Generation Algorithm for Stuck-Open Fault in CMOS Circuits
Author :
Weiwei, Mao ; Xieting, Ling
Author_Institution :
Electronic Engineering Department, Fudan University, Shanghai, People´´s Republic of China
Abstract :
A test generation algorithm for stuck-open faults in CMOS combinational circuits is presented in the paper. A two pattern test, e.g., an initializing input pattern T1 and a test input pattern T2 can be generated at the same time. It is shown that the test {T1,T2} generated using the algorithm is a robust test.
Keywords :
Circuit faults; Circuit testing; Combinational circuits; Electronic equipment testing; Equivalent circuits; FETs; Integrated circuit interconnections; Logic; Robustness; Test pattern generators;
Conference_Titel :
Design Automation, 1986. 23rd Conference on
Print_ISBN :
0-8186-0702-5
DOI :
10.1109/DAC.1986.1586095
