A 0.18 μm CMOS 3–5GHz switched gain low noise amplifier for UWB system

A switched gain wideband differential low noise amplifier (LNA) for the 3.1-5 GHz ultra-wideband (UWB) system is presented. Techniques including serial gate peaking, load shunt peaking, RC feedback networks are used to achieve wideband input matching and large gain bandwidth. To satisfy the requirement of different input power levels, the circuit is designed with two gain mode: high gain mode(HG) and low gain mode(LG). This LNA is fabricated in SMIC 0.18 um 1P6M RF CMOS process. The chip is tested on FR-4 PCB board using chip-on-board package. In HG mode, measured results show a noise figure of 3.2~5.6 dB, a gain of 12.6~15.6 dB, input/output return loss higher than 10/11 dB and an input P1dB of -16 dBm@4 GHz. In LG mode, measured results show a gain of 7.2~8.1 dB, input/output return loss higher than 10/13.2 dB and an input P1dB of is -5.2 dBm 4 GHz. The DC power consumption of the core circuit is 12 mW under a 1.8 V supply voltage.