DocumentCode :
3155425
Title :
Design of data adaptive IFFT/FFT block for OFDM system
Author :
Rajeswari, L.M. ; Manocha, Satish K.
Author_Institution :
Dept. of Electron. & Commun. Eng., Amrita Sch. of Eng., Bangalore, India
fYear :
2011
fDate :
16-18 Dec. 2011
Firstpage :
1
Lastpage :
5
Abstract :
Inverse Fast Fourier Transform/ Fast Fourier Transform (IFFT/FFT) processors are crucial blocks for an Orthogonal Frequency Division Multiplexing (OFDM) transceiver system. However, in the current OFDM systems, the system complexity and processing rate do not vary adaptively with the input data. In this paper, we propose a novel IFFT/FFT architecture for the OFDM Transceiver system that exploits the correlation between bytes of incoming information to adaptively choose between the Radix-2 and Radix- 4 algorithm. Using this architecture, we have achieved additional free data slots per frame. The transceiver system has been tested end-to-end and implemented on FPGA Board.
Keywords :
OFDM modulation; fast Fourier transforms; field programmable gate arrays; radio transceivers; FPGA board; OFDM transceiver system; Radix-2 algorithm; Radix-4 algorithm; data adaptive IFFT/FFT block; inverse fast Fourier transform; Clocks; Computer architecture; Correlation; Discrete Fourier transforms; OFDM; Program processors; Transceivers; Adaptive FFT/IFFT; FFT; IFFT; OFDM;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
India Conference (INDICON), 2011 Annual IEEE
Conference_Location :
Hyderabad
Print_ISBN :
978-1-4577-1110-7
Type :
conf
DOI :
10.1109/INDCON.2011.6139435
Filename :
6139435
Link To Document :
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