DocumentCode
3155442
Title
Built-in self test for content addressable memories
Author
Kang, Yong Seok ; Lee, Jong Cheol ; Kang, Sungho
Author_Institution
Dept. of Electr. Eng., Yonsei Univ., Seoul, South Korea
fYear
1997
fDate
12-15 Oct 1997
Firstpage
48
Lastpage
53
Abstract
A new parallel test algorithm and a Built-in Self Test (BIST) architecture for an efficient testing of various types of functional faults in Content Addressable Memories (CAMs) are developed. In test mode, the read operation is replaced by one parallel content addressable search operation and the writing operation is performed parallel with small peripheral circuit modifications. The results show that an efficient and practical testing with very low complexity and area overhead can be achieved
Keywords
built-in self test; content-addressable storage; fault diagnosis; Built-in Self Test; CAMs; area overhead; content addressable memories; functional faults; low complexity; parallel test algorithm; Associative memory; Automatic testing; CADCAM; Computer aided manufacturing; Logic; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on
Conference_Location
Austin, TX
ISSN
1063-6404
Print_ISBN
0-8186-8206-X
Type
conf
DOI
10.1109/ICCD.1997.628848
Filename
628848
Link To Document