DocumentCode
315621
Title
Low power signal processing architectures for network microsensors
Author
Dong, Michael J. ; Yung, K. Geoffrey ; Kaiser, William J.
Author_Institution
California Univ., Los Angeles, CA, USA
fYear
1997
fDate
18-20 Aug. 1997
Firstpage
173
Lastpage
177
Abstract
Low power signal processing systems are required for distributed network microsensor technology. Network microsensors now provide a new monitoring and control capability for civil and military applications in transportation, manufacturing, biomedical technology, environmental management, and safety and security systems. Signal processing methods for event detection have been developed with low power, parallel architectures that optimize performance for unique sensor system requirements. Implementation of parallel datapaths with shared arithmetic elements enables high throughput at low clock rate. This method has been used to implement a microsensor spectrum analyzer for a 200 sample/s measurement system. This 0.8 /spl mu/ CMOS device operates with a 1 /spl mu/A drain current at a 3 V supply bias.
Keywords
CMOS analogue integrated circuits; analogue processing circuits; microsensors; parallel architectures; spectral analysers; 0.8 micron; 1 muA; 3 V; CMOS device; clock rate; distributed network microsensor technology; event detection; low power signal processing architectures; parallel architectures; parallel datapaths; shared arithmetic elements; spectrum analyzer; Biomedical monitoring; Biomedical signal processing; Control systems; Data security; Environmental management; Manufacturing; Microsensors; Safety; Signal processing; Transportation;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 1997. Proceedings., 1997 International Symposium on
Conference_Location
Monterey, CA, USA
Print_ISBN
0-89791-903-3
Type
conf
Filename
621275
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