DocumentCode :
315622
Title :
K2: an estimator for peak sustainable power of VLSI circuits
Author :
Hsiao, Michael S. ; Rudnick, Elizabeth M. ; Patel, Janak H.
Author_Institution :
Dept. of Electr. & Comput. Eng., Rutgers Univ., Piscataway, NJ, USA
fYear :
1997
fDate :
18-20 Aug. 1997
Firstpage :
178
Lastpage :
183
Abstract :
New measures of peak power in the context of sequential circuits are proposed. This paper presents an automatic procedure to obtain very good lower bounds on these measures as well as the actual input vectors that attain such bounds. The initial state of the circuit is an important factor in determining the amount of switching activity in sequential circuits and is taken into account. A peak power estimator tool K2 was developed using genetic techniques. Experiments show that vector sequences generated by K2 give much more accurate estimates for peak power dissipation than the estimates made from randomly generated sequences.
Keywords :
CMOS logic circuits; VLSI; genetic algorithms; integrated circuit design; integrated circuit measurement; integrated circuit reliability; sequential circuits; VLSI circuits; automatic procedure; genetic techniques; input vectors; peak sustainable power estimator; sequential circuits; switching activity; vector sequences; Circuit testing; Contracts; Permission; Power dissipation; Power generation; Power measurement; Sequential circuits; Switches; Switching circuits; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low Power Electronics and Design, 1997. Proceedings., 1997 International Symposium on
Conference_Location :
Monterey, CA, USA
Print_ISBN :
0-89791-903-3
Type :
conf
Filename :
621276
Link To Document :
بازگشت