Title :
System level analysis of a coprocessor architecture for block matching motion estimation computation
Author :
Cheung, Tommy King-Yin ; Hellestrand, Graham ; Kanthamanon, Prasert
Author_Institution :
VLSI & Syst. Technol. Lab., New South Wales Univ., Sydney, NSW, Australia
Abstract :
This paper describes the design and analysis of a coprocessor architecture for block matching motion estimation algorithm. We have established a system level performance model in terms of various design metrics to estimate the performance cost and to determine a feasible hardware/software partition that satisfies the real-time requirement of the applications
Keywords :
coprocessors; data compression; image matching; motion estimation; real-time systems; video coding; block matching motion estimation computation; coprocessor architecture; design metrics; hardware/software partition; performance model; real-time requirement; system level analysis; Algorithm design and analysis; Application software; Computer architecture; Coprocessors; Costs; Hardware; Motion estimation; Partitioning algorithms; Real time systems; Software performance;
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
DOI :
10.1109/ISCAS.1997.621432
