DocumentCode
315686
Title
A CMOS analog neuro-chip with stochastic learning and multilevel weight storage
Author
Conti, Massimo ; Guaitini, Giovanni ; Turchetti, Claudio
Author_Institution
Dept. of Electron., Ancona Univ., Italy
Volume
3
fYear
1997
fDate
9-12 Jun 1997
Firstpage
1844
Abstract
The chip, fabricated in a 1.0 μm CMOS technology, has a 2-dimension input vector, 16 neurons, 112 weights, each one with a multilevel storage circuit, 28 internal uncorrelated noise sources, a random weight change learning algorithm implemented on-chip and weight access capability
Keywords
CMOS analogue integrated circuits; learning (artificial intelligence); neural chips; speech recognition; stochastic processes; 1.0 micron; CMOS analog neuro-chip; internal uncorrelated noise sources; multilevel weight storage; random weight change learning algorithm; stochastic learning; two-dimension input vector; weight access capability; CMOS technology; Circuit noise; Coupling circuits; Decoding; Differential equations; IEEE members; Neural networks; Neurons; Phased arrays; Stochastic processes;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN
0-7803-3583-X
Type
conf
DOI
10.1109/ISCAS.1997.621507
Filename
621507
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