• DocumentCode
    3156919
  • Title

    Stack simulation for set-associative V/R-type caches

  • Author

    Wu, C. Eric ; Hsu, Yarsun ; Liu, Yew-Huey

  • Author_Institution
    IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • fYear
    1992
  • fDate
    21-25 Sep 1992
  • Firstpage
    332
  • Lastpage
    339
  • Abstract
    Efficient stack simulation has been successfully applied in physically indexed caches with physical or real tags to generate the number of misses and write backs for various cache configurations in a single run. The authors devise a stack simulation algorithm for virtually indexed caches with real tags. Using markers with a valid range for synonym lines, the algorithm is able to keep track of stack distances for various cache configurations. In addition to cache miss ratios and number of write backs, the algorithm reports pseudonym frequency for all cache configurations under investigation. A one-pass cache simulator based on the algorithm is developed, and its results on sample traces are reported
  • Keywords
    buffer storage; digital simulation; storage management; cache configurations; one-pass cache simulator; physically indexed caches; pseudonym frequency; sample traces; set-associative V/R-type caches; stack simulation; Computational modeling; Computer simulation; Counting circuits; Frequency;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Software and Applications Conference, 1992. COMPSAC '92. Proceedings., Sixteenth Annual International
  • Conference_Location
    Chicago, IL
  • Print_ISBN
    0-8186-3000-0
  • Type

    conf

  • DOI
    10.1109/CMPSAC.1992.217582
  • Filename
    217582