DocumentCode
315709
Title
Dynamic compression for sampled-data signals in analog integrated CMOS circuits
Author
Uhlemann, Volker ; Hosticka, Bedrich J. ; Klinke, Roland
Author_Institution
Nokia Mobile Phones, Bochum, Germany
Volume
3
fYear
1997
fDate
9-12 Jun 1997
Firstpage
2004
Abstract
A novel integrated CMOS circuit for signal compression of analog sampled-data signals is presented. It provides charge readout and amplification featuring very high dynamic range, which is useful in applications of capacitive detector arrays or capacitive sensors. The output voltage is proportional to the square-root of the input signal. In this contribution we describe the circuit chip and demonstrate its operation
Keywords
CMOS analogue integrated circuits; amplification; analogue processing circuits; data compression; electric sensing devices; sampled data circuits; amplification; analog integrated CMOS circuits; capacitive detector arrays; capacitive sensors; charge readout; circuit chip; dynamic compression; high dynamic range; sampled-data signals; CMOS analog integrated circuits; CMOS technology; Detectors; Feedback circuits; MOSFETs; Operational amplifiers; Sensor arrays; Switched capacitor circuits; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN
0-7803-3583-X
Type
conf
DOI
10.1109/ISCAS.1997.621547
Filename
621547
Link To Document