Design of wave-parallel computing architectures using orthogonal sequences

Author

Yuminaka, Yasushi ; Sasaki, Yoshzsato

Author_Institution

Dept. of Electron. Eng., Gunma Univ., Japan

Volume

3

fYear

1997

fDate

9-12 Jun 1997

Firstpage

2056

Abstract

Wave-parallel computing (WPC) architectures are proposed to address interconnection problems in massively interconnected VLSI architectures. The fundamental concepts are multiplexing of several signals onto a single line, and their wave-parallel processing without decomposition. This paper discusses the realization of a Hopfield-type fully connected neural network as an example, and shows that the WPC-based network exhibits much lower topological complexity compared with the original network

Keywords

Hopfield neural nets; MOS analogue integrated circuits; VLSI; analogue processing circuits; multiplexing; neural chips; parallel architectures; sequences; Hopfield-type fully connected neural network; massively interconnected VLSI architectures; multiplexing; orthogonal sequences; topological complexity reduction; wave-parallel computing architectures; Computer architecture; Concurrent computing; Delay; Hopfield neural networks; Integrated circuit interconnections; Neural networks; Parallel processing; Power system interconnection; Signal processing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on

Print_ISBN

0-7803-3583-X

Type

conf

DOI

10.1109/ISCAS.1997.621560

Filename

621560