Title :
Concurrent VLSI architectures for vector quantization
Author :
Ancona, Fabio ; Zunino, Rodolfo
Author_Institution :
Dept. of Biophys. & Electron. Eng., Genoa Univ., Italy
Abstract :
The paper describes a methodology to implement vector quantization based neural networks on concurrent VLSI architectures. A toroidal-mesh topology has been used to assess the overall approach. A theoretical analysis of the modular system´s efficiency is presented. Experimental results on a significant testbed (low bit-rate image compression) shows a remarkable increase of the system´s performances. In addition, the fit between predicted and measured efficiency values confirms the validity of the overall theoretical model
Keywords :
VLSI; image coding; iterative methods; neural chips; parallel architectures; vector quantisation; VQ based neural networks; concurrent VLSI architectures; low bit-rate image compression; modular system efficiency; theoretical model; toroidal-mesh topology; vector quantization; Computer architecture; Concurrent computing; Costs; Image coding; Iterative algorithms; Neural networks; Prototypes; Signal processing algorithms; Vector quantization; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
DOI :
10.1109/ISCAS.1997.621565
