A superscalar microprocessor

Author

Intrater, G. ; Talmudi, Ran

Author_Institution

Nat. Semiconductor Ltd., Hertzelia, Israel

fYear

1991

fDate

5-7 Mar 1991

Firstpage

267

Lastpage

270

Abstract

The Swordfish, a new microprocessor in the NS32000/EP family, achieves 100 MIPS peak performance on integer, floating-point, and DSP applications. It utilizes superscalar RISC architecture and incorporates two integer units a single/double precision floating-point unit, instruction and data caches, 64-bit pipelined bus interface unit, two channel direct memory access unit, timer, and a 15-level interrupt control unit

Keywords

microprocessor chips; reduced instruction set computing; 100 MIPS; Swordfish; caches; direct memory access unit; integer units; interrupt control unit; microprocessor; pipelined bus interface unit; single/double precision floating-point unit; superscalar RISC architecture; timer; CMOS logic circuits; Clocks; Computer architecture; Control systems; Costs; Decoding; Digital signal processing; Microprocessors; Pipelines; Reduced instruction set computing;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Electronics Engineers in Israel, 1991. Proceedings., 17th Convention of

Conference_Location

Tel Aviv

Print_ISBN

0-87942-678-0

Type

conf

DOI

10.1109/EEIS.1991.217646

Filename

217646

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3157653