• DocumentCode
    3157695
  • Title

    Lowering the Error Floor of LDPC Codes by a Two-stage Hybrid Decoding Algorithm

  • Author

    Bian, Yueguang ; Wang, Youzheng ; Wang, Jing

  • fYear
    2007
  • fDate
    22-24 Aug. 2007
  • Firstpage
    590
  • Lastpage
    594
  • Abstract
    In this paper, a hybrid decoding scheme is proposed to lower the error floor of low-density parity-check codes. With the observation that some error bits\´ LLR values oscillate throughout iterative decoding procedure, a "feedback BP" (FBP) decoding algorithm is presented as second-stage decoding cell to reduce the phenomena of oscillations. The hybrid decoding scheme, which consists LLR-BP decoding algorithm and FBP decoding algorithm, detects errors in the codewords obtained by using the parity check equations of LDPC codes. Simulation results show that the new decoding scheme exhibits a lower error floor than that of belief propagation decoding algorithm in the moderate and high SNR region.
  • Keywords
    belief networks; error statistics; iterative decoding; parity check codes; LDPC code; LLR-BP decoding algorithm; belief propagation decoding algorithm; error floor; feedback BP decoding algorithm; two-stage hybrid iterative decoding algorithm; AWGN; Belief propagation; Equations; Feedback; Geometry; Iterative algorithms; Iterative decoding; Parity check codes; Processor scheduling; Tin;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Communications and Networking in China, 2007. CHINACOM '07. Second International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4244-1009-5
  • Electronic_ISBN
    978-1-4244-1009-5
  • Type

    conf

  • DOI
    10.1109/CHINACOM.2007.4469460
  • Filename
    4469460