DocumentCode :
3157954
Title :
The Kautz mesh: A new topology for SoCs
Author :
Sabbaghi-Nadooshan, Reza ; Sarbazi-Azad, Hamid
Author_Institution :
Central Tehran & Sci. & Res. Branch, Islamic Azad Univ., Tehran
Volume :
01
fYear :
2008
fDate :
24-25 Nov. 2008
Abstract :
Nowadays networks-on-chip are emerging as a hot topic in IC designs with high integration. In addition to popular mesh topologies, other structures can also be considered especially in 3D VLSI design. The Kautz topology is one of the interconnection architectures for multiprocessors. In this paper we propose an efficient three dimensional layout for a novel 2D mesh structure based on the Kautz topology. Simulation results show that by using the third dimension, performance and latency can be improved compared to the 2D VLSI implementation.
Keywords :
interconnected systems; mesh generation; network-on-chip; very high speed integrated circuits; 2D VLSI implementation; 2D mesh structure; 3D VLSI design; Kautz mesh; SoCs; interconnection architectures; mesh topology; multiprocessors; networks-on-chip; three dimensional layout; Circuit simulation; Circuit topology; Computer networks; Costs; Delay; Energy consumption; Integrated circuit interconnections; Network topology; Network-on-a-chip; Very large scale integration; 3D NoCs; 3D VLSI; 3D layout; Kautz; NoCs; Performance evaluation; Power consumption; SoC;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location :
Busan
Print_ISBN :
978-1-4244-2598-3
Electronic_ISBN :
978-1-4244-2599-0
Type :
conf
DOI :
10.1109/SOCDC.2008.4815632
Filename :
4815632
Link To Document :
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