An improved RF MOSFET model including scalable gate resistance and external inductances

Author

Cha, Jiyong ; Cha, Jun-Young ; Jung, Dae-Hyoun ; Lee, Seonghearn

Author_Institution

Dept. of Electron. Eng., Hankuk Univ. of Foreign Studies, Hankuk

Volume

01

fYear

2008

fDate

24-25 Nov. 2008

Abstract

RF non-quasi-static effect and interconnection delay effect are not considered in a conventional BSIM3v3 RF model. For modeling these effects, an improved RF SPICE model for 0.13 mum MOSFET is developed by including the scalable inductances and using the gate resistance scaling equation. This improved model is validated by finding better agreements with measured S-parameters up to 40 GHz at various W_u and Nf than the conventional one.

Keywords

CMOS integrated circuits; MOSFET; S-parameters; SPICE; inductance; integrated circuit interconnections; integrated circuit modelling; radiofrequency integrated circuits; semiconductor device models; RF CMOS; RF MOSFET model; RF SPICE model; S-parameters; external inductance; frequency 40 GHz; gate resistance scaling equation; interconnection delay effect; nonquasistatic effect; size 0.13 mum; Delay effects; Electrical resistance measurement; Equations; Integrated circuit modeling; MOSFET circuits; Radio frequency; Roentgenium; SPICE; Scattering parameters; Semiconductor device modeling; BSIM3v3; MOSFET; RF CMOS; RF model; SPICE model; modeling; scalable model;

fLanguage

English

Publisher

ieee

Conference_Titel

SoC Design Conference, 2008. ISOCC '08. International

Conference_Location

Busan

Print_ISBN

978-1-4244-2598-3

Electronic_ISBN

978-1-4244-2599-0

Type

conf

DOI

10.1109/SOCDC.2008.4815665

Filename

4815665