Multi-channel fiber-optical receivers in BiCMOS technology, adopting channel coding or delay locked loop retiming

Author

Schuppener, G. ; Mokhtari, M. ; Juhola, T. ; Tenhunen, H. ; Tan, N. ; Niburg, M.

Author_Institution

Dept. of Electron., R. Inst. of Technol., Stockholm, Sweden

Volume

2

fYear

1997

fDate

9-12 Jun 1997

Firstpage

1373

Abstract

4 data-channel synchronous and asynchronous receiver arrays have been designed for data transmission rates of 800 Mb/s and 400 Mb/s, respectively. Channel coding has been adopted to the synchronous version to create a DC-stabilized data stream through the fibre-optical links. The asynchronous version employs a DLL based retiming circuitry. The circuits have been designed for 3.3 V supply voltage in Ericsson Component´s 0.6 μm BiCMOS technology (EPIC-3B). The receiver and transmitter circuits are to be mounted on carriers, including PIN-diode- and laser-arrays, respectively

Keywords

BiCMOS integrated circuits; channel coding; delay circuits; digital communication; optical receivers; timing; 0.6 micron; 3.3 V; 400 Mbit/s; 800 Mbit/s; BiCMOS technology; DC-stabilized data stream; DLL based retiming circuitry; EPIC-3B; asynchronous receiver arrays; channel coding; data transmission; delay locked loop retiming; fibre-optical links; multichannel fiber-optical receivers; synchronous receiver arrays; BiCMOS integrated circuits; Channel coding; Clocks; Costs; Delay; Integrated circuit interconnections; Latches; Optical receivers; Optical transmitters; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on

Print_ISBN

0-7803-3583-X

Type

conf

DOI

10.1109/ISCAS.1997.622128

Filename

622128