Fast Static Characterization of Residual-Based ADCs

Computationally exhaustive time-domain Monte Carlo (MC) simulations are commonly conducted to obtain the static characteristics of a residual analog-to-digital converter (ADC) (e.g., pipelined ADC) for the calculation of the integral nonlinearity (INL) and differential nonlinearity (DNL). In this brief, a new ultrahigh-speed, yet precise, behavioral-level dc characterization algorithm for residual-based ADC is introduced. The algorithm derives the transition points of a given stage of the ADC based on the random parameters of that stage. Then, it merges the dc characteristics of all stages together to extract detailed dc input-output characteristics for the entire ADC. Then, the exact amount of DNL and INL is derived. The proposed algorithm is verified by the results obtained through the conventional time-domain algorithm ran under several MC simulations. The INL and DNL of the algorithms are off by merely 1%. While the proposed algorithm obtains the INL in a few seconds, the conventional algorithm takes hours to achieve the same result. Fast calculation of the yield of the ADC is possible for a given set of values for the variance of stage parameters.