DocumentCode
3159767
Title
ODALRISC: A small, low power, and configurable 32-bit RISC processor
Author
Lee, Imyong ; Lee, Dongwook ; Choi, Kiyoung
Author_Institution
Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul
Volume
03
fYear
2008
fDate
24-25 Nov. 2008
Abstract
Configurable processor has become popular recently, since it can be easily configured and extended to increase the performance without losing the flexibility of the programmable processor. In the era of MP-SoC, the base versions of configurable processors need to be small and low power consuming because many processors are extended and placed on a single chip and so each processor should be as efficient as possible containing only the functional units and instructions necessary for carrying out the specific task assigned to the processor. In this paper, we present the ODALRISC processor, which is an ultra small and low power consuming configurable 32-bit RISC processor. The base version is synthesized using 0.18 mum technology, taking less than 16 k gates and consuming power less than 0.1 mW/MHz.
Keywords
low-power electronics; microprocessor chips; reduced instruction set computing; system-on-chip; MP-SoC; ODALRISC processor; configurable processor; low power consumption; size 0.18 mum; word length 32 bit; Acceleration; Clocks; Computer science; Degradation; Encoding; Energy consumption; Instruction sets; Process design; Reduced instruction set computing; Registers; MP-SoC; configurable processor; low power;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location
Busan
Print_ISBN
978-1-4244-2598-3
Electronic_ISBN
978-1-4244-2599-0
Type
conf
DOI
10.1109/SOCDC.2008.4815732
Filename
4815732
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