DocumentCode
3159990
Title
Design of a scalable sound synthesizer
Author
Kim, Tae-Hwan ; Young-Joo ; Park, In-Cheol
Author_Institution
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon
Volume
03
fYear
2008
fDate
24-25 Nov. 2008
Abstract
This paper presents a scalable sound synthesis system and the implementation results of its prototype design. Based on the inherent data flows of sound synthesis, the proposed sound synthesizer operates according to the reconfigurable algorithm description. A fully-integrated synthesizer system is implemented based on the proposed architecture, and fabricated in a 0.18-mum CMOS process, occupying about 2.25 mm2.
Keywords
CMOS integrated circuits; sound reproduction; CMOS process; reconfigurable algorithm; scalable sound synthesis system; size 0.18 mum; Decision support systems; Synthesizers; Additive Synthesis; Data-flow Model; FM Synthesis; Sound Synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location
Busan
Print_ISBN
978-1-4244-2598-3
Electronic_ISBN
978-1-4244-2599-0
Type
conf
DOI
10.1109/SOCDC.2008.4815747
Filename
4815747
Link To Document