DocumentCode :
3160046
Title :
Implementation of efficient architecture of two-dimensional discrete wavelet transform
Author :
Song, Jinook ; Park, In-Cheol
Author_Institution :
Dept. of Electr. Eng., KAIST, Daejeon
Volume :
03
fYear :
2008
fDate :
24-25 Nov. 2008
Abstract :
This paper presents a new architecture of 2-dimensional discrete wavelet transform for JPEG2000, and the architecture is verified by implementing on FPGA board. The tile-based processing is proposed which removes the transpose buffer effectively.
Keywords :
data compression; discrete wavelet transforms; image coding; 2D discrete wavelet transform; FPGA board; JPEG2000; tile-based processing; Computer architecture; Discrete wavelet transforms; Field programmable gate arrays; Image coding; Low pass filters; Pipelines; Registers; Standards development; Tiles; Transform coding; Discrete Wavelet Transform; JPEG2000;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location :
Busan
Print_ISBN :
978-1-4244-2598-3
Electronic_ISBN :
978-1-4244-2599-0
Type :
conf
DOI :
10.1109/SOCDC.2008.4815749
Filename :
4815749
Link To Document :
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