Study of Discrete Capacitor Embedded Process and Characterization Analysis in Organic-Base Substrate

Author

Wu, Sung-Mao ; Jahja, Endruw ; Yen, Wen-Kuan ; Wang, Jui-Wen

Author_Institution

Nat. Univ. of Kaohsiung, Kaohsiung

fYear

2007

fDate

10-12 Dec. 2007

Firstpage

125

Lastpage

129

Abstract

In this study, an integrated process flow to place more than one discrete chip-type passive components in multilayer organic substrate by build via is presented, reliability test by JEDEC standard is shown too. The phenomenon of simultaneous switch noise (SSN) reduce by decoupling capacitor is measured and simulated by high frequency probing technology and full-wave 3D electromagnetic simulation tools.

Keywords

capacitors; noise; reliability; substrates; JEDEC standard; characterization analysis; decoupling capacitor; discrete capacitor embedded process; discrete chip-type passive components; full-wave 3D electromagnetic simulation tools; high frequency probing technology; integrated process flow; multilayer organic substrate; organic-base substrate; reliability test; simultaneous switch noise; Capacitors; Electromagnetic interference; Electromagnetic measurements; Frequency measurement; Noise measurement; Noise reduction; Nonhomogeneous media; Semiconductor device measurement; Switches; Testing; Embedded substrate; blind via; passive embedded process flow; simultaneous switching noise (SSN);

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics Packaging Technology Conference, 2007. EPTC 2007. 9th

Conference_Location

Singapore

Print_ISBN

978-1-4244-1323-2

Electronic_ISBN

978-1-4244-1323-2

Type

conf

DOI

10.1109/EPTC.2007.4469689

Filename

4469689