DocumentCode :
316066
Title :
Performances of low-voltage, low-power SOI CMOS technology
Author :
Colinge, Jean-Pierre
Author_Institution :
Microelectron. Lab., Univ. Catholique de Louvain, Belgium
Volume :
1
fYear :
1997
fDate :
14-17 Sep 1997
Firstpage :
229
Abstract :
Fully depleted SOI CMOS technology is now showing decisive advantages over bulk CMOS. Low-voltage, low-power SOI circuits operating at respectable speeds have been demonstrated. SOI MOSFETs can also operate at microwave frequencies under low supply voltage, low power dissipation, and low noise figure conditions making them devices of choice for portable communication systems
Keywords :
CMOS integrated circuits; field effect MMIC; integrated circuit noise; mobile radio; silicon-on-insulator; fully depleted technology; low-power SOI CMOS technology; microwave frequencies; noise figure; portable communication systems; power dissipation; CMOS technology; Capacitance; Coupling circuits; MOSFETs; Microwave frequencies; Power supplies; Random access memory; Threshold voltage; Transconductance; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 1997. Proceedings., 1997 21st International Conference on
Conference_Location :
Nis
Print_ISBN :
0-7803-3664-X
Type :
conf
DOI :
10.1109/ICMEL.1997.625225
Filename :
625225
Link To Document :
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